Optimizing Memory Layout and Instruction Order of a Finite Difference Code


Time: 9:20 - 9:40  Current processor and graphics processor architectures heavily usedata and instruction parallelism at different levels. Floating pointoperations are grouped in vector instructions. Memory is organized ina... [ view full abstract ]


  1. Gerhard Zumbusch (Friedrich-Schiller-Universität Jena)

Topic Area

Scientific Software


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