An Electronic Synapse Based on Self-Heating-Enhanced Charge-Trapping in High-k Gate Dielectrics

Abstract

We present a solution to highly compact plastic synapses in large-scale neuromorphic systems by exploiting the self-heating-enhanced charge-trapping in high-k gate dielectrics of advanced-node transistors. It was shown that... [ view full abstract ]

Authors

  1. Xuefeng Gu (University of California Los Angeles)
  2. Faraz Khan (University of California Los Angeles)
  3. Zhe Wan (University of California Los Angeles)
  4. Subramanian Iyer (University of California Los Angeles)

Topic Areas

Topics: Neuromorphic, or “brain inspired”, computing , Topics: In-memory processing , Topics: Novel device physics and materials

Session

PS-1 » Poster Session (19:00 - Monday, 17th October, Ballroom Foyer)

Paper

CTT_Synapse.pdf

Presentation Files

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