Energy Efficiency Limits of Logic and Memory

This paper studies the scaling limits of computer logic and memory technologies that are currently in production or on roadmaps. While progress in computer technology also includes new exotic non-transistor devices, this paper... [ view full abstract ]

This paper studies the scaling limits of computer logic and memory technologies that are currently in production or on roadmaps. While progress in computer technology also includes new exotic non-transistor devices, this paper is only concerned with the limits of current approaches if taken to their extreme endpoint. For logic, the paper analyzes the energy efficiency limits of hypothetical, fully mature, transistor-like devices in CMOS-like circuits. We find that new forms of error correction can be applied that can move beyond the Landauer- Shannon limit by 2× or a little more. For memory, we consider adiabatic and reversible approaches usually associated with reversible logic. However, we find that applying adiabatic and reversible approaches to memory gives excellent results and may be more practical.