Information-Theoretic Limits of Algorithmic Noise Tolerance

Abstract

Statistical error compensation techniques in computing circuits are becoming prevalent, especially as implemented on nanoscale physical substrates. One such technique that has been developed and deployed is algorithmic noise... [ view full abstract ]

Authors

  1. Daewon Seo (University of Illinois at Urbana-Champaign)
  2. Lav Varshney (University of Illinois at Urbana-Champaign)

Topic Areas

Topics: Error-tolerant logic and circuits , Topics: Approximate and stochastic computing

Session

OS-06A » Error Tolerant Logic and Circuits (15:30 - Tuesday, 18th October, Del Mar Ballroom C)

Paper

ID061_ICRC2016_finalpaper.pdf

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