Erasing Logic-Memory Boundaries in Superconductor Electronics
Abstract
Superconducting electronics holds the absolute record for clock frequency and energy efficiency. However, these advantages have so far only given it “a technological back seat” to far more complex CMOS digital circuits.... [ view full abstract ]
Superconducting electronics holds the absolute record for clock frequency and energy efficiency. However, these advantages have so far only given it “a technological back seat” to far more complex CMOS digital circuits. Ironically, the performance and functional density of superconductor circuits decreased when natural finite-state-machine behavior of their RSFQ cells was adapted to memoryless logic gates. We propose to restore this performance by organizing the original “unpasteurized” RSFQ cells into a new family of Memory And loGIC (MAGIC) gate/register objects that run arithmetic calculations as well as store results. The new MAGIC objects eliminate time and energy overheads associated with the conventional transfer of computed data to memory by essentially reducing the transfer distance to zero. The new objects could serve as building blocks for distributed MAGIC-compatible architectures, differing from CMOS-like register files by processing as well as storing data. A simpler Logic Unit (LU) would be sufficient to control the MAGIC registers, because the registers would provide most of the arithmetic functions and separate ALUs would not be needed anymore. The primary goal of the proposed project is to “reboot” the energy consuming process of data exchange between logic and memory.
Authors
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Vasili Semenov
(Stony Brook University)
Topic Areas
Topics: Cellular Neural/Nonlinear Networks (CNN) and Cellular Automata , Topics: Superconducting or cryogenic computing , Topics: In-memory processing
Session
OS-04B » Novel Devices and Physical Computing (10:15 - Tuesday, 18th October, Del Mar Ballroom AB)
Paper
ID107_ICRC2016_final.pdf
Presentation Files
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