Using Resistive Shunts to Reduce Power Consumption in Digital Electronics Based on Superconducting Nanowires
Abstract
Superconducting digital electronics are an attractive potential candidate for future large-scale low-power-consumption computing. Traditional superconducting electronics rely on flux transport in superconducting loops... [ view full abstract ]
Superconducting digital electronics are an attractive potential candidate for future large-scale low-power-consumption computing. Traditional superconducting electronics rely on flux transport in superconducting loops containing Josephson junctions (JJs). More recently, superconducting nanowires operating in a thermal mode have been considered for computing applications. While these devices—called nanoCryotrons (nTrons)—may be easier to fabricate and integrate than JJs, they are based on thermal effects and are thus slower and more energy intensive relative to Josephson-based electronics.
As a first step towards controlling Joule heating in the nTron, we have investigated the use of shunting to alter the resistive state of niobium nitride nanowires with constrictions. Using parallel resistors directly incorporated onto a PCB, we observed a complete suppression of hysteresis at a shunt resistance value of 4.5 Ω, and reduced power dissipation by three orders of magnitude during switching. In addition to reduced hysteresis, changes in the switching and retrapping current distributions were indicative of a shift from a Joule heated resistive state to a coherent, stable state where phase slip centers (PSCs) are dominant. These results were in agreement with our modified RCSJ simulations that model the PSC dominated nanowire as a weak link in parallel with an external shunt.
Authors
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Emily Toomey
(Massachusetts Institute of Technology)
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Adam McCaughan
(Massachusetts Institute of Technology)
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Qing-Yuan Zhao
(Massachusetts Institute of Technology)
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Karl Berggren
(Massachusetts Institute of Technology)
Topic Areas
Topics: Superconducting or cryogenic computing , Topics: Novel device physics and materials
Session
PS-1 » Poster Session (19:00 - Monday, 17th October, Ballroom Foyer)
Paper
ICRC_2016_Abstract_Final.pdf
Presentation Files
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