Neuromorphic Chips: Addressing the Challenges of Nanoscale Transistors by Combining Analog Computation with Digital Communication

As transistors shrink to nanoscale dimensions, errors due to dopant atoms or trapped electrons blocking “lanes” of electron traffic are making it difficult for digital computers to work. In stark contrast, the brain works... [ view full abstract ]

As transistors shrink to nanoscale dimensions, errors due to dopant atoms or trapped electrons blocking “lanes” of electron traffic are making it difficult for digital computers to work. In stark contrast, the brain works well with single-lane nanoscale devices that are intermittently blocked (ion channels). Conjecturing that it achieves error tolerance by combining analog dendritic computation with digital axonal communication, neuromorphic engineers (neuromorphs) began emulating dendrites with subthreshold analog circuits and axons with asynchronous digital circuits in the late eighties. Three decades in, we achieved a consequential scale with Neurogrid, the first neuromorphic system with billions of synaptic connections. We then tackled the challenge of mapping arbitrary computations onto neuromorphic chips in a manner robust to lanes blocked by dopant atoms or trapped electrons. Having demonstrated scalability and programmability, we are embarking on an effort to encode continuous signals efficiently with spike-trains, which would realize the neuromorphic promise of computing expediently with single-lane nanoscale transistors.