A Comparative Study of Chisel for FPGA Design


This paper presents the results of a comparative study conducted into designing with the Chisel hardware construction language against the Verilog hardware description language across a range of standard-library and bespoke... [ view full abstract ]


  1. Paul Lennon (IT Tallaght)
  2. Richard Gahan (IT Tallaght)

Topic Areas

Systems on a chip design , VLSI, ASIC and FPGAs for signal processing


Poster » Poster Session (14:50 - Thursday, 21st June, Ashby Building Foyer)

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