ICCapt: Online design capture and HDL generation, with PYNQ SoC prototyping in the cloud

For students of digital logic design and applications, prototyping of FPGA/SoC digital logic hardware requires knowledge of design principles, hardware description language (HDL) modelling and testbenching, and Electronic... [ view full abstract ]

For students of digital logic design and applications, prototyping of FPGA/SoC digital logic hardware requires knowledge of design principles, hardware description language (HDL) modelling and testbenching, and Electronic Design Automation tools. There is limited availability of locally-installed (or in-house) tools which offer high level wizard-based parameterisable graphical digital logic design capture, with auto-generation of HDL. This paper presents ICCapt, a browser-based parameterisable graphical digital logic design capture wizard. ICCapt enables fast design capture, with auto-generation of synthesisable HDL models. ICCapt integrates with the viciLab cloud FPGA/SoC hardware prototyping and client application console creation toolsuite. Students can build hardware prototypes in the cloud, and visually interact with remote hardware in real time, using their ICCapt-generated block diagrams in the client console. ICCapt helps students to better understand the hierarchical structure of digital logic design and HDLs. The paper presents a series of design-to-prototype examples, and describes the ICCapt web tool architecture and its functions.