Characterizing Slow state Near Si-SiO2 in MOS structure
Abstract
The Equilibrium Voltage Step (EVS) techniquehas been used for extraction of depth and energy concentration profile of trapssituated in the oxide of a lightly stressed metal-oxide-semiconductor (MOS)structure. This has been... [ view full abstract ]
Authors
- Guenifi Naima (University Batna, department of electronics - IMEP-LAHC, Minatec Grenoble, France)
- Mahamdi Ramdane (Department of Electronics, University of Batna, Algeria)
- Daniel Bauza (IMEP-LAHC, Minatec Grenoble, France)
Topic Areas
B - Fabrication processes and applications in the industry , P - Fabrication processes and applications in the industry
Session
PS1 » Poster Session (13:30 - Monday, 3rd July, Main hall)
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